/*
 * dac_pwm.v
 * Copyright (C) 2015  Krzysztof Mazur <krzysiek@podlesie.net>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

module dac_pwm(clk, reset, dac_clk, in, out);

parameter DAC_BITS = 9;

input clk;			/* System clock */
input reset;			/* System reset */
input dac_clk;			/* DAC PWM clock, 1/N fill rate */

input [DAC_BITS - 1:0] in;	/* DAC input */
output out;			/* DAC output */

reg [DAC_BITS - 1:0] pwm = 0;
always @(posedge clk) begin
	if (reset)
		pwm <= 0;
	else if (dac_clk)
		pwm <= pwm + 1;
	else
		pwm <= pwm;
end

reg out = 0;
always @(posedge clk) begin
	if (reset)
		out <= 0;
	else if (pwm < in)
		out <= 1;
	else
		out <= 0;
end

endmodule